Patent · US Active

Handling asynchronous power loss in a memory sub-system that programs sequentially

US11461233B2 · kind B2 · utility

2Cited by

6References

20Claims

0Family size

Assignee

Micron Technology, Inc. · US

Inventors

Johnny A. Lam · Firestone, US
Alex J. Wesenberg · Erie, US
Michael Winterfeld · Firestone, US

Key dates

Filing date	Apr 16, 2021
Grant date	Oct 4, 2022
Priority date	—
Expiry date	Apr 16, 2041

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D10/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A system includes a non-volatile memory (NVM), and a volatile memory to store: a zone map data structure (ZMDS) that maps a zone of a logical block address (LBA) space to a zone index; and a high frequency update table (HFUT). A processing device is to: write, within an entry of the HFUT, a value of a zone write pointer corresponding to the zone index for an active zone, wherein the zone write pointer includes a location in the LBA space for the active zone; write, within an entry of the ZMDS, a table index value that points to the entry of the HFUT; and journal metadata of the entry of one the ZMDS or the HFUT affected by a flush transition between the ZMDS and the HFUT.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.