Multilevel die complex with integrated discrete passive components
US11462521B2 · kind B2 · utility
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1References
20Claims
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Assignee
Inventors
Key dates
| Filing date | Jun 28, 2018 |
| Grant date | Oct 4, 2022 |
| Priority date | — |
| Expiry date | Dec 12, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/645
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A package is disclosed. The package includes a base die. The base die includes voltage regulating circuitry and input and output (I/O) circuitry. The I/O circuitry surrounds the voltage regulating circuitry. The package also includes a top set of dies. The top set of dies includes a plurality of dies that include logic circuitry and a plurality of dies that include passive components. The plurality of dies that include passive components surround the plurality of dies that include logic circuitry. The plurality of dies that includes passive components is coupled to the logic circuitry and to the voltage regulating circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.