Peripheral component interconnect express interface device and operating method thereof
US11467909B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 21, 2021 |
| Grant date | Oct 11, 2022 |
| Priority date | — |
| Expiry date | Oct 21, 2041 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A Peripheral Component Interconnect Express (PCIe) interface device coupled to an external device through a link including a plurality of lanes according to the present disclosure includes an EQ controller controlling the PCIe interface device to perform an equalization operation for determining a transmitter or receiver setting of each of the plurality of lanes, and an EQ information storage storing log information indicating a number of equalization operation attempts with respect to each of a plurality of EQ coefficients and storing error information about an error occurring in an LO state with respect to each of the plurality of EQ coefficients, which includes a transmitter coefficient or a receiver coefficient, wherein the EQ controller determines a final EQ coefficient using the log information and the error information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.