Patent · US Active

Method for executing atomic memory operations when contested

US11467962B2 · kind B2 · utility

0Cited by
4References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 2, 2020
Grant dateOct 11, 2022
Priority date
Expiry dateSep 26, 2040

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/1024
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

Described are methods and a system for atomic memory operations with contended cache lines. A processing system includes at least two cores, each core having a local cache, and a lower level cache in communication with each local cache. One local cache configured to request a cache line to execute an atomic memory operation (AMO) instruction, receive the cache line via the lower level cache, receive a probe downgrade due to other local cache requesting the cache line prior to execution of the AMO, and send the AMO instruction to the lower level cache for remote execution in response to the probe downgrade.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.