Patent · US Active

Memory system, memory controller, and operation method thereof

US11474726B2 · kind B2 · utility

0Cited by
0References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 7, 2020
Grant dateOct 18, 2022
Priority date
Expiry dateSep 9, 2040

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/7207
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Embodiments of the present disclosure relate to a memory system, a memory controller, and an operation method thereof, in which a data storage space of a memory device is divided into N namespaces, and in which each namespace is controlled so as to share a super memory block with other namespaces or to occupy the same exclusively, thereby minimizing an increase in the time taken to format each of a plurality of namespaces while efficiently storing data in a plurality of namespaces.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.