Stacked nanowire or nanosheet gate-all-around device and method for manufacturing the same

US11476328B2 · kind B2 · utility

Assignee

• INSTITUTE OF MICROELECTRONICS OF THE CHINESE ACADEMY OF SCIENCES · CN

Inventors

• Yongliang Li · Beijing, CN
• Xiaohong Cheng · Beijing, CN
• Qingzhu ZHANG · Beijing, CN
• Huaxiang Yin · Beijing, CN
• Wenwu Wang · Beijing, CN

Key dates

• Filing date: Mar 20, 2020
• Grant date: Oct 18, 2022
• Expiry date: Mar 20, 2040

Classification

• Technology area (CPC B): Performing Operations; Transporting
• CPC primary: B82Y10/00
• WIPO field: Micro-structural and nano-technology
• WIPO sector: Chemistry

Abstract

A stacked nanowire or nanosheet gate-all-around device, including: a silicon substrate; stacked nanowires or nanosheets located on the silicon substrate, extending along a first direction gate stacks and including multiple nanowires or nanosheets that are stacked; a gate stack, surrounding each of the stacked nanowires or nanosheets, and extending along a second direction, where first spacers are located on two sidewalls of the gate stack in the first direction; source-or-drain regions, located at two sides of the gate stack along the first direction; a channel region, including a portion of the stacked nanowires or nanosheets that is located between the first spacers. A notch structure recessed inward is located between the stacked nanowires or nanosheets and the silicon substrate, and includes an isolator that isolates the stacked nanowires or nanosheets from the silicon substrate. A method for manufacturing the stacked nanowire or nanosheet gate-all-around device is further provided.