Circuits and methods for detecting and unlocking edge-phase lock
US11477059B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 22, 2021 |
| Grant date | Oct 18, 2022 |
| Priority date | — |
| Expiry date | Nov 22, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/49
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A receiver samples an analog, multi-level, pulse-amplitude-modulated signal using a clock-and-data recovery circuit (CDR) that samples the signal against adaptively calibrated symbol-decision thresholds in time with a clock signal that is phased aligned with and locked to the signal. The CDR can erroneously align the clock signal to inter-symbol edges of the signal, a condition called “edge lock,” rather than on the symbols themselves. A transition-type detector senses the edge-lock condition and unlocks the CDR, which can then realign the clock signal, this time on the symbols rather than the inter-symbol edges. The receiver can also respond to the edge-lock condition by kick-starting a shift of symbol-decision threshold that helps the CDR settle more quickly on correct symbol-decision thresholds.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.