Marcus Van Ierssel
19Patents
2h-index
21Co-inventors
50Inventor score
Filing activity: Sep 13, 2011 → Feb 1, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8879618B2 | Decision feedback equalizer and transceiver | Electricity | 12 | Active |
| US9716582B2 | Deserialized dual-loop clock radio and data recovery circuit | Electricity | 3 | Active |
| US11477059B2 | Circuits and methods for detecting and unlocking edge-phase lock | Electricity | 2 | Active |
| US11206031B2 | Phase rotator non-linearity reduction | Electricity | 1 | Active |
| US10855297B2 | Phase rotator non-linearity reduction | Electricity | 1 | Active |
| US10211972B2 | Deserialized dual-loop clock radio and data recovery circuit | Electricity | 0 | Active |
| US12425014B1 | Self-aligning interconnect for a digital system | Electricity | 0 | Active |
| US11671286B2 | Live offset cancellation of the decision feedback equalization data slicers | Electricity | 0 | Active |
| US12368447B1 | Clock generator system with dynamic frequency crossover | Electricity | 0 | Active |
| US11569975B2 | Baud-rate clock recovery lock point control | Electricity | 0 | Active |
| US11881883B2 | Pattern detection based parameter adaptation | Electricity | 0 | Active |
| US12057975B2 | Live offset cancellation of the decision feedback equalization data slicers | Electricity | 0 | Active |
| US11601151B2 | Pattern detection based parameter adaptation | Electricity | 0 | Active |
| US11831323B2 | Methods and circuits for reducing clock jitter | Electricity | 0 | Active |
| US11742874B2 | Matched digital-to-analog converters | Electricity | 0 | Active |
| US11804846B2 | Phase-locked loop with phase information multiplication | Electricity | 0 | Active |
| US11671108B2 | Offset calibration for successive approximation register analog to digital converter | Electricity | 0 | Active |
| US11539374B2 | Matched digital-to-analog converters | Electricity | 0 | Active |
| US11342929B2 | Offset calibration for successive approximation register analog to digital converter | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.