Patent · US Active

Integer matrix multiplication engine using pipelining

US11481472B2 · kind B2 · utility

2Cited by
7References
20Claims
0Family size

Inventor

Key dates

Filing dateJul 30, 2020
Grant dateOct 25, 2022
Priority date
Expiry dateJan 7, 2041

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F7/16
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Techniques for data manipulation using integer matrix multiplication using pipelining are disclosed. A first integer matrix with dimensions m×k and a second integer matrix with dimensions k×n are obtained for matrix multiplication within a processor. The first and second integer matrices employ a two's complement variable radix point data representation. The first and second integer matrices are distilled into (j×j) submatrices. A first variable radix point format and an initial value for an accumulator register are configured dynamically. A first variable radix point format is configured dynamically for the first integer matrix and a second variable radix point format is configured dynamically for the second integer matrix. Multiply-accumulate operations are executed in a pipelined fashion on the (j×j) submatrices of the first integer matrix and the second integer matrix, where a third variable radix point format is configured for the result.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.