David Simpson
41Patents
5h-index
19Co-inventors
62Inventor score
Filing activity: Oct 31, 2005 → Feb 12, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7747612B2 | Indication of exclusive items in a result set | Physics | 42 | Expired |
| US7747614B2 | Difference control for generating and displaying a difference result set from the result sets of a plurality of search engines | Physics | 11 | Expired |
| US7681087B2 | Apparatus and method for persistent report serving | Physics | 8 | Active |
| US10235219B2 | Backward compatibility by algorithm matching, disabling features, or throttling performance | Emerging Cross-Sectional Technologies | 6 | Active |
| US9892024B2 | Backward compatibility testing of software in a mode that disrupts timing | Physics | 5 | Active |
| US10275239B2 | Deriving application-specific operating parameters for backwards compatiblity | Physics | 5 | Active |
| US9760113B2 | Backward compatibility through use of spoof clock and fine grain frequency control | Physics | 4 | Active |
| US10134102B2 | Graphics processing hardware for using compute shaders as front end for vertex shaders | Physics | 4 | Active |
| US10534395B2 | Backward compatibility through use of spoof clock and fine grain frequency control | Physics | 3 | Active |
| US10176621B2 | Using compute shaders as front end for vertex shaders | Physics | 3 | Active |
| US11227030B2 | Matrix multiplication engine using pipelining | Physics | 2 | Active |
| US11403099B2 | Backward compatibility by restriction of hardware resources | Physics | 2 | Active |
| US11481472B2 | Integer matrix multiplication engine using pipelining | Physics | 2 | Active |
| US11119528B2 | Backward compatibility through use of spoof clock and fine grain frequency control | Physics | 1 | Active |
| US11934308B2 | Processor cluster address generation | Physics | 1 | Active |
| US10733691B2 | Fragment shaders perform vertex shader computations | Physics | 0 | Active |
| US10096079B2 | Fragment shaders perform vertex shader computations | Physics | 0 | Active |
| US8166350B2 | Apparatus and method for persistent report serving | Physics | 0 | Active |
| US11170461B2 | System and method for efficient multi-GPU rendering of geometry by performing geometry analysis while rendering | Physics | 0 | Active |
| US11829197B2 | Backward compatibility through use of spoof clock and fine grain frequency control | Physics | 0 | Active |
| US11232534B2 | Scheme for compressing vertex shader output parameters | Physics | 0 | Active |
| US11880426B2 | Integer matrix multiplication engine using pipelining | Physics | 0 | Active |
| US10303488B2 | Real-time adjustment of application-specific operating parameters for backwards compatibility | Physics | 0 | Active |
| US12118641B2 | System and method for efficient multi-GPU rendering of geometry by performing geometry analysis while rendering | Physics | 0 | Active |
| US10740867B2 | Scheme for compressing vertex shader output parameters | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.