Method of forming a contact plug in a semiconductor integrated circuit device
US11482452B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 24, 2020 |
| Grant date | Oct 25, 2022 |
| Priority date | — |
| Expiry date | Jan 27, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28562
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a method of forming a contact plug in a semiconductor integrated circuit device, the contact plug may be formed in a process chamber of a substrate-processing apparatus. The process chamber may have a process space. The process chamber may include a substrate supporter placed in a lower region of the process space to support a semiconductor substrate, and a gas injector placed in an upper region of the process space to inject a gas to the semiconductor substrate. An insulating interlayer having a contact hole may be formed on the semiconductor substrate loaded into the process space. A nucleation layer may be formed on an inner surface of the contact hole and an upper surface of the insulating interlayer. A semi-bulk layer may be formed on the nucleation layer in a lower region of the contact hole. An inhibiting layer may be formed on the semi-bulk layer and the exposed nucleation layer. A main-bulk layer may be formed on the semi-bulk layer to fill the contact hole with the main-bulk layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.