Semiconductor package and method for making the same
US11482461B2 · kind B2 · utility
0Cited by
33References
20Claims
0Family size
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Key dates
| Filing date | Oct 29, 2020 |
| Grant date | Oct 25, 2022 |
| Priority date | — |
| Expiry date | Oct 29, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/167
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a semiconductor chip disposed over a first main surface of a first substrate, a package lid disposed over the semiconductor chip, and spacers extending from the package lid through corresponding holes in the first substrate. The spacers enter the holes at a first main surface of the first substrate and extend beyond an opposing second main surface of the first substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.