Patent · US Active

Semiconductor wafer having epitaxial layer

US11482597B2 · kind B2 · utility

0Cited by

2References

8Claims

0Family size

Assignee

Siltronic AG · DE

Inventors

Norbert Werner · Dodge City, US
Christian Hager · Ahaus, DE

Key dates

Filing date	Dec 12, 2018
Grant date	Oct 25, 2022
Priority date	—
Expiry date	Apr 13, 2039

Classification

Technology area (CPC H)Electricity
CPC primaryH01L21/02658
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A semiconductor wafer of monocrystalline silicon. The semiconductor wafer having: a substrate wafer of monocrystalline silicon; and a layer of monocrystalline silicon that lies on a front side of the substrate wafer. The substrate wafer has a crystal orientation. An averaged front side-based ZDD of the semiconductor wafer, with a division of a surface of an epitaxial layer into 16 sectors and an edge exclusion of 1 mm, is not less than −30 nm/mm2 and not more than 0 nm/mm2. An ESFQRmax of the semiconductor wafer, with an edge exclusion of 1 mm and 72 sectors each with a length of 30 mm, is at most 10 nm.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.