Method of forming a gate structure
US11482610B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Jul 17, 2020 |
| Grant date | Oct 25, 2022 |
| Priority date | — |
| Expiry date | Oct 20, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of forming a semiconductor device are provided. A method according to the present disclosure includes forming, over a workpiece, a dummy gate stack comprising a first semiconductor material, depositing a first dielectric layer over the dummy gate stack using a first process, implanting the workpiece with a second semiconductor material different from the first semiconductor material, annealing the dummy gate stack after the implanting, and replacing the dummy gate stack with a metal gate stack.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.