Bwo-Ning Chen
19Patents
1h-index
19Co-inventors
47Inventor score
Filing activity: May 11, 2012 → Jun 13, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US11139432B1 | Methods of forming a FinFET device | Electricity | 5 | Active |
| US11081401B2 | Semiconductor device and method for manufacturing the same | Electricity | 1 | Active |
| US8872228B2 | Strained-channel semiconductor device fabrication | Electricity | 1 | Active |
| US11916105B2 | Semiconductor device with corner isolation protection and methods of forming the same | Electricity | 1 | Active |
| USRE47562E1 | Strained-channel semiconductor device fabrication | General | 0 | Active |
| US11688647B2 | Semiconductor device and method for manufacturing the same | Electricity | 0 | Active |
| US12315738B2 | Method of forming a gate structure including semiconductor material implantation into dummy gate stack | Electricity | 0 | Active |
| US11594680B2 | Method of forming a FinFET device | Electricity | 0 | Active |
| US11991936B2 | Method of forming a FinFET device | Electricity | 0 | Active |
| US11728405B2 | Stress-inducing silicon liner in semiconductor devices | Electricity | 0 | Active |
| US12349432B2 | Enlarged backside contact | Electricity | 0 | Active |
| US11482610B2 | Method of forming a gate structure | Electricity | 0 | Active |
| US11935954B2 | Semiconductor device structure and method for forming the same | Electricity | 0 | Active |
| US11949016B2 | Multi-gate device and related methods | Electricity | 0 | Active |
| US12113118B2 | Stress-inducing silicon liner in semiconductor devices | Electricity | 0 | Active |
| US11133386B2 | Multi-layer fin structure | Electricity | 0 | Active |
| US12356660B2 | Multi-gate device and related methods | Electricity | 0 | Active |
| US12027425B2 | Method of forming a gate structure | Electricity | 0 | Active |
| US12317550B2 | Methods of forming a semiconductor device with corner isolation protection | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.