System reference (SYSREF) signal system and method
US11483005B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2022 |
| Grant date | Oct 25, 2022 |
| Priority date | — |
| Expiry date | Jun 28, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/1803
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Described herein are a method and apparatus for a selective SYSREF (SYStem REFerence signal) scheme that is driven by an external SYSREF source for a system that may include, for example, analog blocks, such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), radio frequency (RF) arrays, as well as digital blocks, which may include JESD serializer/deserializer (SERDES) Transport and Link Layer circuitry, all of which can be operating at different clock frequencies. In one aspect, synchronization of the components is achieved when an internal SYSREF for the analog blocks is keyed off the external SYSREF, but the internal SYSREF pulse used by the digital blocks is programmatically keyed off one of the periodic internal SYSREF pulses. Additionally, a mechanism is provided for synchronization of the programmatically selected internal SYSREF across different clock domains in the digital blocks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.