Inventor · Murrieta, CA, US

Gregory Ameriada Uvieghara

15Patents
4h-index
16Co-inventors
57Inventor score

Filing activity: May 24, 2002 → Dec 22, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US6794914B2 Non-volatile multi-threshold CMOS latch with leakage control Electricity 237 Expired
US6998895B2 System for reducing leakage in integrated circuits during sleep mode Electricity 11 Expired
US7245546B2 Reduced area, reduced programming voltage CMOS efuse-based scannable non-volatile memory bitcell Physics 7 Expired
US9184130B2 Electrostatic protection for stacked multi-chip integrated circuits Electricity 5 Active
US7236418B2 Reduced area, reduced programming voltage CMOS eFUSE-based scannable non-volatile memory bitcell Physics 3 Expired
US9082498B2 N-well switching circuit Physics 3 Active
US8830779B1 Low voltage fuse-based memory with high voltage sense amplifier Physics 2 Active
US8599597B2 Circuits configured to remain in a non-program state during a power-down event Physics 2 Active
US7136319B2 Reduced area, reduced programming voltage CMOS eFUSE-based scannable non-volatile memory bitcell Physics 2 Expired
US8787096B1 N-well switching circuit Electricity 2 Active
US11483005B1 System reference (SYSREF) signal system and method Electricity 1 Active
US8908464B2 Protection for system configuration information Physics 1 Active
US9252765B2 N-well switching circuit Electricity 1 Active
US11663157B1 Joint electron devices engineering council (JESD)204-to-peripheral component interconnect express (PCIe) interface Physics 0 Active
US9318165B2 Method and apparatus for low-level input sense amplification Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.