Memory systems and methods including training, data organizing, and/or shadowing
US11487433B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2020 |
| Grant date | Nov 1, 2022 |
| Priority date | — |
| Expiry date | Sep 1, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7208
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Described embodiments include memory systems that may shadow certain data stored in a first memory device (e.g. NAND flash device) onto a second memory device (e.g. DRAM device). Memory systems may train and/or re-organize stored data to facilitate the selection of data to be shadowed. Initial responses to memory commands may be serviced from the first memory device, which may have a lower latency than the second memory device. The remaining data may be serviced from the second memory device. A controller may begin to access the remaining data while the initial response is being provided from the first memory device, which may reduce the apparent latency associated with the second memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.