Mirror device structure for power MOSFET and method of manufacture
US11489072B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 7, 2021 |
| Grant date | Nov 1, 2022 |
| Priority date | — |
| Expiry date | Apr 24, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/519
Abstract
A MOSFET includes a substrate having a body region of a first conductivity type. A main field effect transistor (mainFET) and a mirror device are formed in the substrate. The mainFET includes first gate trenches, first source regions of a second conductivity type adjacent to the first gate trenches, and first body implant regions of the first conductivity type extending into the body region adjacent to and interposed between the first source regions. The mirror device includes second gate trenches, second source regions of the second conductivity type adjacent to the second gate trenches, second body implant regions of the first conductivity type extending into the body region adjacent to and interposed between the second source regions, and link elements of the first conductivity type interconnecting pairs of the second body implant regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.