Reliable resistive random access memory

US11489118B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Baozhen Li · South Bend, US
• Chih-Chao Yang · Glenmont, US
• Ernest Y. Wu · South Burlington, US
• Andrew Tae Kim · Plano, US

Key dates

• Filing date: Mar 4, 2019
• Grant date: Nov 1, 2022
• Expiry date: Mar 4, 2039

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N70/8836

Abstract

A resistive random access memory (RRAM) device and a method for constructing the device is described. A capping layer structure is provided over a bottom contact where the capping layer includes a recess situated over the bottom contact. A first portion of the recess is filled with a lower electrode such that the width of the recess defines the width of the lower electrode. A second portion of the recess is filled with a high-K layer so that a bottom surface of the high-K layer has a stepped profile. A top electrode is formed on the high-K layer and a top contact is formed on the top electrode. The width of the high-K layer is greater than the width of the lower electrode to prevent shorting between the top contact and the lower electrode of the RRAM device.