Quantum computing die assembly with thru-silicon vias and connected logic circuit
US11493714B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 25, 2021 |
| Grant date | Nov 8, 2022 |
| Priority date | — |
| Expiry date | Jan 25, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/00014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Techniques disclosed herein relate to devices that each include one or more photonic integrated circuits and/or one or more electronic integrated circuits. In one embodiment, a device includes a silicon substrate, a die stack bonded (e.g., fusion-bonded) on the silicon substrate, and a printed circuit board (PCB) bonded on the silicon substrate, where the PCB is electrically coupled to the die stack. The die stack includes a photonic integrated circuit (PIC) that includes a photonic integrated circuit, and an electronic integrated circuit (EIC) die that includes an electronic integrated circuit, where the EIC die and the PIC die are bonded face-to-face (e.g., by fusion bonding or hybrid bonding) such that the photonic integrated circuit and the electronic integrated circuit face each other. In some embodiments, the device also includes a plurality of optical fibers coupled to the photonic integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.