Method of forming multi-stack transistors in a single semiconductor die

US11495499B2 · kind B2 · utility

Assignee

• Arm Limited · GB

Inventors

• Amit Chhabra · Noida, IN
• David Victor Pietromonaco · San Jose, US

Key dates

• Filing date: Dec 17, 2020
• Grant date: Nov 8, 2022
• Expiry date: Feb 2, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D88/01

Abstract

Various implementations described herein relate to a method for manufacturing, or causing to be manufactured, multiple devices packaged within a single semiconductor die. The multiple devices may have first devices that are arranged in a first multi-transistor stack with a first P-N configuration. The multiple devices may have second devices that are arranged in a second multi-transistor stack with a second P-N configuration that is different than the first P-N configuration.