Non-volatile memory device and control method
US11501822B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2021 |
| Grant date | Nov 15, 2022 |
| Priority date | — |
| Expiry date | Jun 21, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3427
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory device and a control method are provided e disclosed. The non-volatile memory device includes a memory array, a bit line, a plurality of word lines, a first control circuit, and second control circuit. The bit line is connected to a first memory string of the memory array. The plurality of word lines are connected to memory cells of the first memory string and each word line is connected to a respective memory cell. The first control circuit is configured to apply a bit line pre-pulse signal to the bit line during a pre-charge period. The second control circuit is configured to apply a word line signal to a selected word line and apply a plurality of word line pre-pulse signals to word lines disposed between a select gate line and the selected word line. Voltage levels of the plurality of word line pre-pulse signals are incremental.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.