Microelectronics package with enhanced thermal dissipation
US11502060B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 20, 2020 |
| Grant date | Nov 15, 2022 |
| Priority date | — |
| Expiry date | Nov 20, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19106
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package system is disclosed. The system includes a first interposer and a first integrated circuit die electrically coupled and thermally coupled to a first side of the first interposer. The system further includes a second integrated circuit die electrically coupled and thermally coupled to a second side of the first interposer. The system further includes a ring carrier electrically coupled and thermally coupled to the first interposer. The ring carrier is configured to transmit an input to the first interposer. In some embodiments, the system further includes at least one thermal spreader thermally coupled to the ring carrier and at least one of the first integrated circuit, the second integrated circuit, or the first interposer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.