Methods for forming three-dimensional memeory devices with drain-select-gate cut structures
US11502098B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 22, 2020 |
| Grant date | Nov 15, 2022 |
| Priority date | — |
| Expiry date | May 22, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
Abstract
Embodiments of structures and methods for forming three-dimensional (3D) memory devices are provided. In an example, a 3D memory device includes a core region and a staircase region. The staircase region includes a plurality of stairs each has at least a conductor/dielectric pair extending in a lateral direction. The staircase region includes a drain-select-gate (DSG) cut structure extending along the lateral direction and a vertical direction, and a plurality of support structures extending in the DSG structure along the vertical direction. Of at least one of the support structures, a dimension along the lateral direction is greater than a dimension along a second lateral direction perpendicular to the lateral direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.