Spoofing a processor identification instruction
US11507368B2 · kind B2 · utility
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1References
20Claims
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Assignee
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Key dates
| Filing date | Dec 25, 2020 |
| Grant date | Nov 22, 2022 |
| Priority date | — |
| Expiry date | Dec 25, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/45508
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of processors, methods, and systems for a processor core supporting processor identification instruction spoofing are described. In an embodiment, a processor includes an instruction decoder and processor identification instruction spoofing logic. The processor identification spoofing logic is to respond to a processor identification instruction by reporting processor identification information from a processor identification spoofing data structure. The processor identification spoofing data structure is to include processor identification information of one or more other processors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.