Neural network accelerator including bidirectional processing element array
US11507429B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 18, 2018 |
| Grant date | Nov 22, 2022 |
| Priority date | — |
| Expiry date | Sep 16, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N5/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided is a neural network accelerator which performs a calculation of a neural network provided with layers, the neural network accelerator including a kernel memory configured to store kernel data related to a filter, a feature map memory configured to store feature map data which are outputs of the layers, and a Processing Element (PE) array including PEs arranged along first and second directions, wherein each of the PEs performs a calculation using the feature map data transmitted in the first direction from the feature map memory and the kernel data transmitted in the second direction from the kernel memory, and transmits a calculation result to the feature map memory in a third direction opposite to the first direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.