Nonvolatile memory device having resistance change structure
US11508741B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 12, 2020 |
| Grant date | Nov 22, 2022 |
| Priority date | — |
| Expiry date | Jan 21, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/82
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory device according to an embodiment includes a substrate having an upper surface, a gate line structure disposed over the substrate, a gate dielectric layer covering one sidewall surface of the gate line structure and disposed over the substrate, a channel layer disposed to cover the gate dielectric layer and disposed over the substrate, a bit line structure and a resistance change structure to contact different portions of the channel layer over the substrate, and a source line structure disposed in the resistance change structure. The gate line structure includes at least one gate electrode layer pattern and interlayer insulation layer pattern that are alternately stacked along a first direction perpendicular to the substrate, and extends in a second direction perpendicular to the first direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.