Reset and safe state logic generation in dual power flow devices

US11513544B1 · kind B1 · utility

Assignee

• STMicroelectronics International N.V. · NL

Inventors

• Venkata Narayanan Srinivasan · Greater Noida, IN
• Mayankkumar Hareshbhai Niranjani · Lathi, IN
• Dhulipalla Phaneendra Kumar · Noida, IN
• Gourav Garg · Kaithal, IN
• Sourabh Banzal · Noida, IN

Key dates

• Filing date: Nov 29, 2021
• Grant date: Nov 29, 2022
• Expiry date: Nov 29, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03K19/20
• WIPO field: Control
• WIPO sector: Instruments

Abstract

An electric device includes: a first power domain; a second power domain; a third power domain, where during power-up, the third, the second, and the first power domains are configured to be powered up sequentially, where during standby-exit, the first, the second, and the third power domains are configured to be powered up sequentially; isolation paths that provide controlled signal transmission among the first, the second, and the third power domains, where each isolation path includes an isolation circuit between an input power domain and an output power domain of the isolation path; and a control circuit in the first power domain, where for each isolation path, the control circuit is configured to generate an isolation control signal for the isolation circuit, where the isolation circuit is configured enable or disable signal transmission along the isolation path.