One transistor two capacitors nonvolatile memory cell
US11515314B2 · kind B2 · utility
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3References
19Claims
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Key dates
| Filing date | Jun 4, 2020 |
| Grant date | Nov 29, 2022 |
| Priority date | — |
| Expiry date | Mar 10, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/60
Abstract
A nonvolatile memory device is provided. The device comprises a memory transistor. A first capacitor is coupled to the memory transistor. A second capacitor is coupled to the memory transistor. The second capacitor comprises a first electrode and a second electrode. The first capacitor and the second capacitor are connected to separate input terminals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.