Self-aligned contacts for walled nanosheet and forksheet field effect transistor devices

US11515399B2 · kind B2 · utility

Assignee

• IMEC VZW · BE

Inventors

• Eugenio Dentoni Litta · Leuven, BE
• Juergen Boemmels · Heverlee, BE
• Julien Ryckaert · Schaerbeek - Schaarbeek, BE
• Naoto Horiguchi · Leuven, BE
• Pieter Weckx · Bunsbeek, BE

Key dates

• Filing date: Dec 4, 2020
• Grant date: Nov 29, 2022
• Expiry date: Feb 9, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/85
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

In one aspect, a method of forming a semiconductor device can comprise forming a first transistor structure and a second transistor structure separated by a first trench which comprises a first dielectric wall protruding above a top surface of the transistor structures. The first and the second transistor structures each can comprise a plurality of stacked nanosheets forming a channel structure, and a source portion and a drain portion horizontally separated by the channel structure. The method further can comprise depositing a contact material over the transistor structures and the first dielectric wall, thereby filling the first trench and contacting a first source/drain portion of the first transistor structure and a first source/drain portion of the second transistor structure. Further, the method can comprise etching back the contact material layer below a top surface of the first dielectric wall, thereby forming a first contact contacting the first source/drain portion of the first transistor structure, and a second contact contacting the first source/drain portion of the second transistor structure.