Patent · US Active

Semiconductor device structure having multiple gate terminals

US11515428B2 · kind B2 · utility

0Cited by
2References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 23, 2020
Grant dateNov 29, 2022
Priority date
Expiry dateMar 2, 2041

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/6739

Abstract

One example provides an integrated circuit comprising a transistor including a semiconductor channel. The semiconductor channel includes three or more sub-channels, one or more nodes, each node being a junction of at least three sub-channels, and channel ends. A Schottky contact at each channel end forms a source or drain contact, and a gate contact disposed at each Schottky contact controls a barrier conductivity of the corresponding Schottky contact.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.