Reduced capacitance land pad
US11516915B2 · kind B2 · utility
0Cited by
21References
19Claims
0Family size
Assignee
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Key dates
| Filing date | Sep 3, 2019 |
| Grant date | Nov 29, 2022 |
| Priority date | — |
| Expiry date | Sep 4, 2041 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A land grid array (LGA) land pad having reduced capacitance is disclosed. The conductive portion of a land pad that overlaps a parallel ground plane within the substrate is reduced by one or more non-conductive voids though the thickness of the conductive portion of the land pad. The voids may allow the contact area of the land pad, as defined by the perimeter of the land pad, to remain the same while reducing the conductive portion that overlaps the parallel ground plane. Capacitance between the land pad and the parallel ground plane is reduced by an amount proportional to the reduction in overlapping conductive area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.