System watchdog timer for a data processing system
US11520654B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 3, 2021 |
| Grant date | Dec 6, 2022 |
| Priority date | — |
| Expiry date | Jun 24, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of performing a system watchdog operation of a data processing system using a system watchdog timer includes creating an initial question, starting a timer of the system watchdog timer, receiving an initial answer and an initial data code, calculating an expected data code in response to the initial question, and comparing the initial data code to the expected data code. In response to a mismatch between the initial data code and the expected data code, a bus error signal is generated. In response to a match, the initial answer is compared to the initial question, and in response to a match between the initial answer and the initial question, the timer is reset and the initial data code is stored as a subsequent question, but in response to a mismatch, a remedial action of the data processing system is performed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.