Resistive memory device and methods of making such a resistive memory device
US11522131B2 · kind B2 · utility
2Cited by
2References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2020 |
| Grant date | Dec 6, 2022 |
| Priority date | — |
| Expiry date | Jul 31, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8833
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An illustrative device disclosed herein includes a bottom electrode, a conformal switching layer positioned above the bottom electrode and a top electrode positioned above the conformal switching layer. The top electrode includes a conformal layer of conductive material positioned above the conformal switching layer and a conductive material positioned above the conformal layer of conductive material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.