Sacrificial redistribution layer in microelectronic assemblies having direct bonding

US11527501B1 · kind B1 · utility

Assignee

• Intel Corporation · US

Inventors

• Adel A. Elsherbini · Chandler, US
• Veronica Strong · Hillsboro, US
• Shawna M. Liff · Scottsdale, US
• Brandon M. Rawlings · Chandler, US
• Jagat Shakya · Hillsboro, US
• Johanna M. Swan · Scottsdale, US
• David Craig · Albany, US
• Jeremy Alan Streifer · Beaverton, US
• Brennen Mueller · Portland, US

Key dates

• Filing date: Dec 15, 2020
• Grant date: Dec 13, 2022
• Expiry date: Dec 15, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/18161
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first microelectronic component having a first direct bonding region, wherein the first direct bonding region includes first metal contacts and a first dielectric material between adjacent ones of the first metal contacts; a second microelectronic component having a second direct bonding region and coupled to the first microelectronic component by the first and second direct bonding regions, wherein the second direct bonding region includes second metal contacts and a second dielectric material between adjacent ones of the second metal contacts, and wherein individual first metal contacts in the first direct bonding region are coupled to respective individual second metal contacts in the second direct bonding region; and a void between an individual first metal contact and a respective individual second metal contact.