Higher yielding improved matching reference circuit especially applicable for high speed mixed signal applications and phase locked loops and charge pumps
US11527953B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 21, 2021 |
| Grant date | Dec 13, 2022 |
| Priority date | — |
| Expiry date | Oct 21, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/093
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase locked loop having a charge pump is described. The charge pump relies on close matching of FETs (Field Effect Transistor) electrical parameters to FETs in a current reference circuit. To achieve close matching of FET electrical performance, FEOL (Front End Of Line), comprising all FET shapes, of the current pump is identical in shapes and layout to the current reference circuit. BEOL (Back End Of Line) differs between the charge pump and the current reference circuit. The charge pump and the current reference circuit are arranged in a row. A shield circuit having FEOL shapes and layout identical to the current pump may be placed at each end of the row.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.