Remote SSD debug via host/serial interface and method of executing the same
US11532372B2 · kind B2 · utility
0Cited by
1References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 5, 2019 |
| Grant date | Dec 20, 2022 |
| Priority date | — |
| Expiry date | Jun 28, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0401
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Memory systems and method of operating the same enable debugging of a memory system with vendor unique (VU) commands without using a physical cable connection to a debugging port on the memory system. In one aspect, a Universal Asynchronous Receiver-Transmitter (UART) protocol is serialized over a VU host protocol. In another aspect, Joint Test Action Group (JTAG) may be performed over UART or serial advanced technology attachment (SATA).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.