Non-volatile memory device and method for fabricating the same
US11532716B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Feb 18, 2020 |
| Grant date | Dec 20, 2022 |
| Priority date | — |
| Expiry date | Oct 8, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory device includes a substrate. A plurality of shallow trench isolation (STI) lines are disposed on the substrate and extend along a first direction. A memory gate structure is disposed on the substrate between adjacent two of the plurality of STI lines. A trench line is disposed in the substrate and extends along a second direction intersecting the first direction, wherein the trench line also crosses top portions of the plurality of STI lines. A conductive line is disposed in the trench line and used as a selection line to be coupled to the memory gate structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.