Semiconductor device and method of manufacture

US11532750B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Li-Li Su · Zhubeikou, TW
• Wei-Min Liu · Dublin, US
• Wei Hao Lu · Taoyuan, TW
• Chien-I Kuo · Dingshanjiao, TW
• Yee-Chia Yeo · Baoshan, TW

Key dates

• Filing date: Jul 28, 2020
• Grant date: Dec 20, 2022
• Expiry date: Jul 28, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/017

Abstract

A device includes a fin extending from a substrate; a gate stack over and along sidewalls of the fin; a gate spacer along a sidewall of the gate stack; an epitaxial source/drain region in the fin and adjacent the gate spacer, the epitaxial source/drain region including a first epitaxial layer on the fin, the first epitaxial layer including silicon and arsenic; and a second epitaxial layer on the first epitaxial layer, the second epitaxial layer including silicon and phosphorus, the first epitaxial layer separating the second epitaxial layer from the fin; and a contact plug on the second epitaxial layer.