Li-Li Su
50Patents
3h-index
44Co-inventors
58Inventor score
Filing activity: Jan 20, 2016 → Apr 16, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9831116B2 | FETS and methods of forming FETs | Electricity | 17 | Active |
| US10453943B2 | FETS and methods of forming FETS | Electricity | 10 | Active |
| US10529803B2 | Semiconductor device with epitaxial source/drain | Electricity | 5 | Active |
| US11004724B2 | FETS and methods of forming FETS | Electricity | 3 | Active |
| US10340190B2 | Semiconductor device structure and method for forming the same | Electricity | 3 | Active |
| US10867861B2 | Fin field-effect transistor device and method of forming the same | Electricity | 3 | Active |
| US10950730B2 | Merged source/drain features | Electricity | 2 | Active |
| US10510607B1 | Semiconductor device convex source/drain region | Electricity | 2 | Active |
| US11444181B2 | Source/drain formation with reduced selective loss defects | Electricity | 2 | Active |
| US11205713B2 | FinFET having a non-faceted top surface portion for a source/drain region | Electricity | 1 | Active |
| US10468482B2 | Semiconductor device and manufacturing method thereof | Electricity | 1 | Active |
| US11728208B2 | FETS and methods of forming FETS | Electricity | 1 | Active |
| US11355641B2 | Merged source/drain features | Electricity | 1 | Active |
| US12255255B2 | Method of manufacturing a FinFET with merged epitaxial source/drain regions | Electricity | 0 | Active |
| US12419084B2 | Methods of forming transistor source/drain regions comprising carbon liner layers | Electricity | 0 | Active |
| US11532750B2 | Semiconductor device and method of manufacture | Electricity | 0 | Active |
| US12094761B2 | FETs and methods of forming FETs | Electricity | 0 | Active |
| US12243931B2 | Source/drain epitaxial layers for transistors | Electricity | 0 | Active |
| US11600715B2 | FETs and methods of forming FETs | Electricity | 0 | Active |
| US11804487B2 | Source/drain regions of semiconductor devices and methods of forming the same | Electricity | 0 | Active |
| US11527650B2 | FinFET device having a source/drain region with a multi-sloped undersurface | Electricity | 0 | Active |
| US12074071B2 | Source/drain structures and method of forming | Electricity | 0 | Active |
| US12132118B2 | Semiconductor device having a multilayer source/drain region and methods of manufacture | Emerging Cross-Sectional Technologies | 0 | Active |
| US11018224B2 | Semiconductor device with epitaxial source/drain | Electricity | 0 | Active |
| US11688793B2 | Integrated circuit structure and manufacturing method thereof | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.