Resistance-area (RA) control in layers deposited in physical vapor deposition chamber
US11542589B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2019 |
| Grant date | Jan 3, 2023 |
| Priority date | — |
| Expiry date | Sep 27, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/01
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
Methods for depositing a dielectric oxide layer atop one or more substrates disposed in or processed through a PVD chamber are provided herein. In some embodiments, such a method includes: sputtering source material from a target assembly onto a first substrate while the source material is at a first erosion state and while providing a first amount of RF power to the target assembly to deposit a dielectric oxide layer onto a first substrate having a desired resistance-area; and subsequently sputtering source material from the target assembly onto a second substrate while the source material is at a second erosion state and while providing a second amount of RF power to the target assembly, wherein the second amount of RF power is lower than the first amount of RF power by a predetermined amount calculated to maintain the desired resistance-area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.