Memory device structure and method for forming the same

US11545619B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Hsing-Hsiang WANG · Jinshanmian, TW
• Han-Ting Lin · Hsinchu, TW
• Yu-Feng Yin · Dashulong, TW
• Sin-Yi Yang · Taichung, TW
• Chen-Jung Wang · Hsinchu, TW
• Yin-Hao Wu · Taichung, TW
• Kun-Yi Li · Tainan, TW
• Meng-Chieh Wen · Kaohsiung, TW
• Lin Lin · Riverside, US
• Jiann-Horng Lin · Hsinchu, TW
• An-Shen Chang · Wubei, TW
• Huan-Just Lin · Hsinchu, TW

Key dates

• Filing date: Jul 21, 2020
• Grant date: Jan 3, 2023
• Expiry date: Jan 13, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N50/85

Abstract

A method for forming a memory device structure is provided. The method includes providing a substrate, a first dielectric layer, a conductive via, a magnetic tunnel junction cell, a first etch stop layer, and a first spacer layer. The substrate has a first region and a second region, the first dielectric layer is over the substrate, the conductive via passes through the first dielectric layer over the first region. The method includes removing the first etch stop layer, which is not covered by the first spacer layer. The method includes removing the first dielectric layer, which is not covered by the first etch stop layer.