Method, system, and apparatus for supporting multiple address spaces to facilitate data movement
US11550722B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 2, 2021 |
| Grant date | Jan 10, 2023 |
| Priority date | — |
| Expiry date | Mar 2, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/657
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, systems, and apparatuses provide support for multiple address spaces in order to facilitate data movement. One system includes a host processor; a memory; a data fabric coupled to the host processor and to the memory; a first input/output memory manage unit (IOMMU) and a second IOMMU, each of the first and second IOMMUs coupled to the data fabric; a first root port and a second root port, each of the first and second root ports coupled to a corresponding IOMMU of the first and second IOMMUs; and a first peripheral component endpoint and a second peripheral component endpoint, each of the first and second peripheral component endpoints coupled to a corresponding root port of the first and second root ports, wherein each of the first and second root ports comprises hardware control logic operative to: synchronize the first and second root ports.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.