Vertical-type nonvolatile memory device including an extension area contact structure
US11552099B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 14, 2020 |
| Grant date | Jan 10, 2023 |
| Priority date | — |
| Expiry date | Dec 25, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
Abstract
A vertical-type nonvolatile memory device including: a substrate including a cell array area and an extension area, the extension area extending in a first direction from the cell array area and including contacts; a channel structure extending in a vertical direction from the substrate; a first stack structure including gate electrode layers and interlayer insulating layers alternately stacked along sidewalls of the channel structure; a plurality of division areas extending in the first direction and dividing the cell array area and the extension area in a second direction perpendicular to the first direction; in the extension area, two insulating layer dams are arranged between two division areas adjacent to each other; a second stack structure including sacrificial layers and interlayer insulating layers alternately stacked on the substrate between the two insulating layer dams; and an electrode pad connected to a first gate electrode layer in the extension area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.