Semiconductor devices and methods of manufacturing thereof
US11552195B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 14, 2021 |
| Grant date | Jan 10, 2023 |
| Priority date | — |
| Expiry date | Apr 14, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6757
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device in a first area includes first non-planar semiconductor structures separated with a first distance, and a first isolation region including a first layer and a second layer that collectively embed a lower portion of each of the first non-planar semiconductor structures. At least one of the first layer or second layer of the first isolation region is in a cured state. The semiconductor device in a second area includes second non-planar semiconductor structures separated with a second distance, and a second isolation region including a first layer and a second layer that collectively embed a lower portion of each of the second non-planar semiconductor structures. At least one of the first or second layer of the second isolation region is in a cured state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.