Simultaneous write and search operation in a content addressable memory
US11557328B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2021 |
| Grant date | Jan 17, 2023 |
| Priority date | — |
| Expiry date | Mar 5, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A ternary content addressable memory (TCAM) device comprising an input interface having a first input for receiving first data and a second input for receiving second data; and a memory configured to write the first data into an address selected row of the memory at the same time that a comparison is performed between the second data and at least one other row of the memory different from the address selected row. More particularly, the input interface may further have a third input for receiving a search enable signal and a fourth input for receiving a write enable signal, wherein the memory is configured to write the first data and perform the comparison in response to assertion of the search enable signal at the same time as assertion of the write enable signal. An associated method is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.