Wet cleaning with tunable metal recess for via plugs
US11557512B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 14, 2020 |
| Grant date | Jan 17, 2023 |
| Priority date | — |
| Expiry date | Dec 14, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/564
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one exemplary aspect, a method comprises providing a semiconductor structure having a substrate, one or more first dielectric layers over the substrate, a first metal plug in the one or more first dielectric layers, and one or more second dielectric layers over the one or more first dielectric layers and the first metal plug. The method further comprises etching a via hole into the one or more second dielectric layers to expose the first metal plug, etching a top surface of the first metal plug to create a recess thereon, and applying a metal corrosion protectant comprising a metal corrosion inhibitor to the top surface of the first metal plug.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.