Semiconductor device having first memory section and second memory section
US11557631B2 · kind B2 · utility
0Cited by
34References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 3, 2020 |
| Grant date | Jan 17, 2023 |
| Priority date | — |
| Expiry date | Nov 3, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/71
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a semiconductor device including first conductive lines, second conductive lines crossing the first conductive lines, and memory cells at intersections between the first conductive lines and the second conductive lines. Each of the memory cells includes a magnetic tunnel junction pattern, a bi-directional switching pattern connected in series to the magnetic tunnel junction pattern, and a conductive pattern between the magnetic tunnel junction pattern and the bi-directional switching pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.