Patent · US Active

Microelectronic devices with tiered decks of differing pillar density and related methods and systems

US11563027B2 · kind B2 · utility

0Cited by
4References
24Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 9, 2020
Grant dateJan 24, 2023
Priority date
Expiry dateNov 7, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B43/10

Abstract

Microelectronic devices include a lower deck and an upper deck, each comprising a stack structure with a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. A lower array of pillars extends through the stack structure of the lower deck, and an upper array of pillars extends through the stack structure of the upper deck. Along an interface between the lower deck and the upper deck, the pillars of the lower array align with the pillars of the upper array. At least at elevations comprising bases of the pillars, a pillar density of the pillars of the lower array differs from a pillar density of the pillars of the upper array, “pillar density” being a number of pillars per unit of horizontal area of the respective array. Related methods and electronic systems are also disclosed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.